ECS 36b Homework #5
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ECS 36 b
Homework #5 (programming, 5%)
Due: Monday, May 22, 2023, 11:59 p.m.
For this homework, we will experiment programs related to memory. This is a two-persons team project.
During recent lectures, we learned the concept of Memory Layout for Single, Multiple, and Virtual Inheritance. The class definitions for Core, Thing, and IOT_Thing (in the example) can be found from:
https://github.com/sfelixwu/memory_layout
Your task is to write a C++ program such that it will create an IOT_Thing object, like in ml_IOT_Thing.cpp, and your program will print the addresses of every component (vtable pointers for each of child/parent/grandparent classes, and the attributes). You need to go through the same process for the following four cases –
(1) Single inheritance, (2) Single Virtual Inheritance, (3) Multiple Inheritance (both Thing and Another_Thing), and finally (4) Virtual Inheritance involving both Thing and Another_Thing.
For each case, you should have a separate program. And, your output should be similar to the Clang tool we presented in the class, but you need to add memory addresses to each LINE of the output below –
g++ -cc1 -std=c++14 -fdump-record-layouts …
*** Dumping AST Record Layout
0 | class IOT_Thing
0 | (IOT_Thing vtable pointer)
8 | class IP_Address connected
8 | unsigned int addr
48 | class Core (virtual base)
48 | unsigned int class_id
16 | class Thing (virtual base)
16 | (Thing vtable pointer)
24 | unsigned int model
28 | unsigned int sequence_num
32 | class GPS_DD location
32 | double latitude
40 | double longitude
Please follow the steps on CSIF:
· Create a subdirectory ecs36b_s2023, and then cd ecs36b_s2023.
· Create a subdirectory hw5, and then cd hw5.
· Copy all your related files (*.cpp, *.h. and Makefile)into the hw5 directory
· cd ..
· tar zcvf hw5_submission_<team_name>.tar.gz hw5
· upload to Canvas
2023-06-10